So if we want to read the data of the X-axis, first we need to send the device address and then the particular internal register address for the X-axis.

For example the ADX345 Accelerometer has a unique device address and addition internal registers addresses for the X, Y and Z axis. The internal registers are locations in the slave’s memory containing various information or data. Next is the internal registers addressing. In such a case the master device decides how it will proceed. For example, the slave might be busy, might not understand the received data or command, cannot receive any more data and so on. If the slave does not pull the SDA line down, the condition is called Not Acknowledge, and means that it didn’t successfully received the previous sequence which can be caused by several reasons. So at this time the master device hands the control of the SDA line over to the slave device and if the slave device has successfully received the previous sequence it will pull the SDA line down to the condition called Acknowledge. The next bit AKC/ NACK is used by the slave device to indicate whether it has successfully received the previous sequence of bits. The device addressing sequence stars with the most significant bit (MSB) first and ends with the least significant bit (LSB) and it’s actually composed of 7 bits because the 8 th bit is used for indicating whether the master will write to the slave (logic low) or read from it (logic high). After this the clock starts and each data bit is transferred during each clock pulse. The start condition occurs when data line drops low while the clock line is still high. Let’s take even closer look at these events. Right after the addressing sequences follows the data sequences as many until the data is completely sent and it ends with a special stop condition. After the first Acknowledge bit in most cases comes another addressing sequence but this time for the internal registers of the slave device. After each 8 bits sequence follows a bit called Acknowledge.

So after a special start condition occurs comes the first 8 bits sequence which indicates the address of the slave to which the data is being sent. The data signal is transferred in sequences of 8 bits. Commonly used values for the resistors are from 2K for higher speeds at about 400 kbps, to 10K for lower speed at about 100 kbps. The two lines are “open-drain” which means that pull up resistors needs to be attached to them so that the lines are high because the devices on the I2C bus are active low.

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